20/01/31 07:47:25.34 IOLtJofF0.net
DRAM Calculator for Ryzen v1.7.0
Changelog 1.7.0
Added the functionality to read current memory timings for Zen 2 (AM4).
Added a memory bandwidth test (Read and Write).
Added an Inter-Core Latency test (AM4).
Improved the accuracy of Random and Custom latency test.
Some changes in the suggested CAD_BUS settings. This could offer a significant improvement in stability for configurations with 2 or more RAM modules.
VDDG setting is now divided into 2 independent settings : VDDG IOD and VDDG CCD voltage (as in AGESA 1004B bioses).
"Compare timings" now works for Zen 2 (AM4).
Added support for 3000 series Threadripper cpu's (Castle Peak).
Minor user experience GUI changes.
Added support for Hynix DJR (a new CJR revision that has backward compatibility with classic CJR).
Minor bugfixes